arXiv · 0910.1682
Plans for PANDA Online Computing
Abstract
The PANDA experiment will not use any hardware trigger, i.e. all raw data are streaming in the data acquisition with a bandwidth of ~280 GB/s. The PANDA Online System is designed to perform data reduction by a factor of ~800 by reconstruction algorithms programmed in VHDL (Very High Speed Integrated Circuit Hardware Description Language) on FPGAs (Field Programmable Gate Arrays).
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Jens Soeren Lange, Dapeng Jin, Daniel Kirschner, Andreas Kopp, Wolfgang Kuehn, Johannes Lang, Lu Li, Ming Liu, ZhenAn Liu, David Muenchow, Tiago Perez, Johannes Roskoss, Qiang Wang, Hao Xu, Shuo Yang. 2009-10-09. Plans for PANDA Online Computing. https://doi.org/10.1088/1748-0221/4/11/p11001
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