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arXiv · 1303.3755

First Principle-based Analysis of Single-Walled Carbon Nanotube and Silicon Nanowire Junctionless Transistors

Lida Ansari·Baruch Feldman·Giorgos Fagas·Carlos Martinez Lacambra·Michael G. Haverty·Kelin J. Kuhn·Sadasivan Shankar·James C. Greer
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Abstract

Junctionless transistors made of silicon have previously been demonstrated experimentally and by simulations. Junctionless devices do not require fabricating an abrupt source-drain junction and thus can be easier to implement in aggressive geometries. In this paper, we explore a similar architecture for aggressively scaled devices with the channel consisting of doped carbon nanotubes (CNTs). Gate all around (GAA) field effect transistor (FET) structures are investigated for n- and p-type doping. Current-voltage characteristics and sub-threshold characteristics for a CNTbased junctionless FET is compared with a junctionless silicon nanowire (SiNW) FET with comparable dimensions. Despite the higher on-current of the CNT channels, the device characteristics are poorer compared to the silicon devices due to the smaller CNT band gap.

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Lida Ansari, Baruch Feldman, Giorgos Fagas, Carlos Martinez Lacambra, Michael G. Haverty, Kelin J. Kuhn, Sadasivan Shankar, James C. Greer. 2013-03-15. First Principle-based Analysis of Single-Walled Carbon Nanotube and Silicon Nanowire Junctionless Transistors. https://doi.org/10.1109/tnano.2013.2279424

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