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arXiv · 1303.4051

The failure risk analysis of digital circuits

A. N. Pchelintsev
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Abstract

To analyze the failure risk of asynchronous digital circuits the time-parameter is introduced into the Boolean algebra replacing the arithmetic operations by logical operations. There considered an example of construction of signals passing through the logical elements, using the described below mathematical apparatus.

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A. N. Pchelintsev. 2013-03-17. The failure risk analysis of digital circuits. https://arxiv.org/abs/1303.4051

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