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arXiv · 1406.2544

Faithful Glitch Propagation in Binary Circuit Models

Abstract

Modern digital circuit design relies on fast digital timing simulation tools and, hence, on accurate binary-valued circuit models that faithfully model signal propagation, even throughout a complex design. Unfortunately, it was recently proved [F\"ugger et al., ASYNC'13] that no existing binary-valued circuit model proposed so far, including the two most commonly used pure and inertial delay channels, faithfully captures glitch propagation: For the simple Short-Pulse Filtration (SPF) problem, which is related to a circuit's ability to suppress a single glitch, we showed that the quite broad class of bounded single-history channels either contradict the unsolvability of SPF in bounded time or the solvability of SPF in unbounded time in physical circuits. In this paper, we propose a class of binary circuit models that do not suffer from this deficiency: Like bounded single-history channels, our involution channels involve delays that may depend on the time of the previous output transition. Their characteristic property are delay functions which are based on involutions, i.e., functions that form their own inverse. A concrete example of such a delay function, which is derived from a generalized first-order analog circuit model, reveals that this is not an unrealistic assumption. We prove that, in sharp contrast to what is possible with bounded single-history channels, SPF cannot be solved in bounded time due to the nonexistence of a lower bound on the delay of involution channels, whereas it is easy to provide an unbounded SPF implementation. It hence follows that binary-valued circuit models based on involution channels allow to solve SPF precisely when this is possible in physical circuits. To the best of our knowledge, our model is hence the very first candidate for a model that indeed guarantees faithful glitch propagation.

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BibTeXRIS

Matthias Függer, Robert Najvirt, Thomas Nowak, Ulrich Schmid. 2014-06-10. Faithful Glitch Propagation in Binary Circuit Models. https://arxiv.org/abs/1406.2544

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