Development of the Pixelated Photon Detector Using Silicon on Insulator Technology for TOF-PET

Akihiro Koyama; Kenji Shimazoe; Hiroyuki Takahashi; Tadashi Orita; Yasuo Arai; Ikuo Kurachi; Toshinobu Miyoshi; Daisuke Nio; Ryutaro Hamasaki

arXiv · 1507.06721

Development of the Pixelated Photon Detector Using Silicon on Insulator Technology for TOF-PET

Akihiro Koyama·Kenji Shimazoe·Hiroyuki Takahashi·Tadashi Orita·Yasuo Arai·Ikuo Kurachi·Toshinobu Miyoshi·Daisuke Nio·Ryutaro Hamasaki

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Abstract

To measure light emission pattern in scintillator, higher sensitivity and faster response are required to photo detector. Such as single photon avalanche diode (SPAD), conventional pixelated photo detector is operated at Geiger avalanche multiplication. However higher gain of SPAD seems very attractive, photon detection efficiency per unit area is low. This weak point is mainly caused by Geiger avalanche mechanism. To overcome these difficulties, we designed Pixelated Linear Avalanche Integration Detector using Silicon on Insulator technology (SOI-Plaid). To avoid dark count noise and dead time comes from quench circuit, we are planning to use APD in linear multiplication mode. SOI technology enables laminating readout circuit and APD layer, and high-speed and low-noise signal reading regardless smaller gain of linear APD. This study shows design of linear APD by using SOI fabrication process. We designed test element group (TEG) of linear APD and inspected optimal structure of linear APD.

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Akihiro Koyama, Kenji Shimazoe, Hiroyuki Takahashi, Tadashi Orita, Yasuo Arai, Ikuo Kurachi, Toshinobu Miyoshi, Daisuke Nio, Ryutaro Hamasaki. 2015-07-24. Development of the Pixelated Photon Detector Using Silicon on Insulator Technology for TOF-PET. https://arxiv.org/abs/1507.06721

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