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arXiv · 1508.05413

Symmetric Complementary Logic Inverter Using Integrated Black Phosphorus and MoS2 Transistors

Abstract

The operation of an integrated two-dimensional complementary metal-oxide-semiconductor inverter with well-matched input/output voltages is reported. The circuit combines a few-layer MoS2 n-MOSFET and a black phosphorus (BP) p-MOSFET fabricated using a common local backgate electrode with thin (20 nm) HfO2 gate dielectric. The constituent devices have linear threshold voltages of -0.8 V and +0.8 V and produce peak transconductances of 16 uS/um and 41 uS/um for the MoS2 n-MOSFET and BP p-MOSFET, respectively. The inverter shows a voltage gain of 3.5 at a supply voltage, VDD = 2.5 V, and has peak switching current of 108 uA and off-state current of 8.4 uA (2.4 uA) at VIN = 0 (VIN = 2.5 V). In addition, the inverter has voltage gain greater than unity for VDD > 0.5 V, has open butterfly curves for VDD > 1 V, and achieves static noise margin over 500 mV at VDD = 2.5 V. The voltage gain was found to be insensitive to temperature between 270 K and 340 K, and AC large and small-signal operation was demonstrated at frequencies up to 100 kHz. The demonstration of a complementary 2D inverter which operates in a symmetric voltage window suitable for driving a subsequent logic stage is a significant step forward in developing practical applications for devices based upon 2D materials.

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Yang Su, Chaitanya U. Kshirsagar, Matthew C. Robbins, Nazila Haratipour, Steven J. Koester. 2016-02-21. Symmetric Complementary Logic Inverter Using Integrated Black Phosphorus and MoS2 Transistors. https://doi.org/10.1088/2053-1583%2F3%2F1%2F011006

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