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arXiv · 1509.04328

Evolution of structure of some binary group based n bit comparator, n-to-2n decoder by reversible technique

Neeraj Kumar Misra·Subodh Wairya·Vinod Kumar Singh
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Abstract

Reversible logic has attracted substantial interest due to its low power consumption which is the main concern of low power VLSI circuit design. In this paper, a novel 4x4 reversible gate called inventive gate has been introduced and using this gate 1-bit, 2-bit, 8-bit, 32-bit and n-bit group-based reversible comparator have been constructed with low value of reversible parameters. The MOS transistor realizations of 1-bit, 2- bit, and 8-bit of reversible comparator are also presented and finding power, delay and power delay product (PDP) with appropriate aspect ratio W/L. Novel inventive gate has the ability to use as an n-to-2n decoder. Different proposed novel reversible circuit design style is compared with the existing ones. The relative results shows that the novel reversible gate wide utility, group-based reversible comparator outperforms the present design style in terms of number of gates, garbage outputs and constant input.

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Neeraj Kumar Misra, Subodh Wairya, Vinod Kumar Singh. 2015-09-11. Evolution of structure of some binary group based n bit comparator, n-to-2n decoder by reversible technique. https://doi.org/10.5121/vlsic.2014.5502

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