Correcting Two Deletions and Insertions in Racetrack Memory

Alireza Vahid; Georgios Mappouras; Daniel J. Sorin; Robert Calderbank

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arXiv · 1701.06478

Correcting Two Deletions and Insertions in Racetrack Memory

Alireza Vahid·Georgios Mappouras·Daniel J. Sorin·Robert Calderbank

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Abstract

Racetrack memory is a non-volatile memory engineered to provide both high density and low latency, that is subject to synchronization or shift errors. This paper describes a fast coding solution, in which delimiter bits assist in identifying the type of shift error, and easily implementable graph-based codes are used to correct the error, once identified. A code that is able to detect and correct double shift errors is described in detail.

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BibTeX RIS

Alireza Vahid, Georgios Mappouras, Daniel J. Sorin, Robert Calderbank. 2017-04-13. Correcting Two Deletions and Insertions in Racetrack Memory. https://arxiv.org/abs/1701.06478

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