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arXiv · 1901.10980

Meeting the Scaling Challenge for Post-Silicon Nanoelectronics using CaF2 Insulators

Abstract

Two-dimensional (2D) semiconductors have been suggested both for ultimately-scaled field-effect transistors (FETs) and More-than-Moore nanoelectronics. However, these targets can not be reached without accompanying gate insulators which are scalable into the nanometer regime. Despite the considerable progress in the search for channel materials with high mobilities and decent bandgaps, finding high-quality insulators compatible with 2D technologies has remained a challenge. Typically used oxides (e.g. SiO2, Al2O3 and HfO2) are amorphous when scaled, while two-dimensional hBN exhibits excessive gate leakages. To overcome this bottleneck, we extend the natural stacking properties of 2D heterostructures to epitaxial fluorite (CaF2), which forms a quasi van der Waals interface with 2D semiconductors. We report scalable single-layer MoS2 FETs with a crystalline CaF2 insulator of about 2 nm thickness, which corresponds to an equivalent oxide thickness of less than 1 nm. While meeting the stringent requirements of low leakage currents, our devices exhibit highly competitive performance and record-small hysteresis. As such, our results present a breakthrough for very large scale integration towards commercially competitive nano-electronic devices.

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Yury Yu. Illarionov, Alexander G. Banshchikov, Dmitry K. Polyushkin, Stefan Wachter, Theresia Knobloch, Mischa Thesberg, Michael Stoeger-Pollach, Andreas Steiger-Thirsfeld, Mikhail I. Vexler, Michael Waltl, Nikolai S. Sokolov, Thomas Mueller, Tibor Grasser. 2019-01-30. Meeting the Scaling Challenge for Post-Silicon Nanoelectronics using CaF2 Insulators. https://arxiv.org/abs/1901.10980

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