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arXiv · 2005.14691

Dynamic Merge Point Prediction

Abstract

Despite decades of research, conditional branch mispredictions still pose a significant problem for performance. Moreover, limit studies on infinite size predictors show that many of the remaining branches are impossible to predict by current strategies. Our work focuses on mitigating performance loss in the face of impossible to predict branches. This paper presents a dynamic merge point predictor, which uses instructions fetched on the wrong path of the branch to dynamically detect the merge point. Our predictor locates the merge point with an accuracy of 95%, even when faced with branches whose direction is impossible to predict. Furthermore, we introduce a novel confidence-cost system, which identifies costly hard-to-predict branches. Our complete system replaces 58% of all branch mispredictions with a correct merge point prediction, effectively reducing MPKI by 43%. This result demonstrates the potential for dynamic merge point prediction to significantly improve performance.

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Stephen Pruett, Yale Patt. 2020-05-29. Dynamic Merge Point Prediction. https://arxiv.org/abs/2005.14691

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