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arXiv · 2008.07411

High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor

V. Negîrneac·H. Ali·N. Muthusubramanian·F. Battistel·R. Sagastizabal·M. S. Moreira·J. F. Marques·W. Vlothuizen·M. Beekman·N. Haider·A. Bruno·L. DiCarlo
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Abstract

We introduce the sudden variant (SNZ) of the Net Zero scheme realizing controlled-$Z$ (CZ) gates by baseband flux control of transmon frequency. SNZ CZ gates operate at the speed limit of transverse coupling between computational and non-computational states by maximizing intermediate leakage. The key advantage of SNZ is tuneup simplicity, owing to the regular structure of conditional phase and leakage as a function of two control parameters. We realize SNZ CZ gates in a multi-transmon processor, achieving $99.93\pm0.24\%$ fidelity and $0.10\pm0.02\%$ leakage. SNZ is compatible with scalable schemes for quantum error correction and adaptable to generalized conditional-phase gates useful in intermediate-scale applications.

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V. Negîrneac, H. Ali, N. Muthusubramanian, F. Battistel, R. Sagastizabal, M. S. Moreira, J. F. Marques, W. Vlothuizen, M. Beekman, N. Haider, A. Bruno, L. DiCarlo. 2020-08-17. High-fidelity controlled-Z gate with maximal intermediate leakage operating at the speed limit in a superconducting quantum processor. https://doi.org/10.1103/physrevlett.126.220502

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