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arXiv · 2008.08883

High-Performance Simultaneous Multiprocessing for Heterogeneous System-on-Chip

Kris Nikov·Mohammad Hosseinabady·Rafael Asenjo·Andrés Rodríguezz·Angeles Navarro·Jose Nunez-Yanez
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Abstract

This paper presents a methodology for simultaneous heterogeneous computing, named ENEAC, where a quad core ARM Cortex-A53 CPU works in tandem with a preprogrammed on-board FPGA accelerator. A heterogeneous scheduler distributes the tasks optimally among all the resources and all compute units run asynchronously, which allows for improved performance for irregular workloads. ENEAC achieves up to 17\% performance improvement \ignore{and 14\% energy usage reduction,} when using all platform resources compared to just using the FPGA accelerators and up to 865\% performance increase \ignore{and up to 89\% energy usage decrease} when using just the CPU. The workflow uses existing commercial tools and C/C++ as a single programming language for both accelerator design and CPU programming for improved productivity and ease of verification.

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Kris Nikov, Mohammad Hosseinabady, Rafael Asenjo, Andrés Rodríguezz, Angeles Navarro, Jose Nunez-Yanez. 2020-08-20. High-Performance Simultaneous Multiprocessing for Heterogeneous System-on-Chip. https://arxiv.org/abs/2008.08883

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