Hybrid CMOS/Memristor Circuit Design Methodology

Sachin Maheshwari; Spyros Stathopoulos; Jiaqi Wang; Alexander Serb; Yihan Pan; Andrea Mifsud; Lieuwe B. Leene; Jiawei Shen; Christos Papavassiliou; Timothy G. Constandinou; Themistoklis Prodromakis

arXiv · 2012.02267

Hybrid CMOS/Memristor Circuit Design Methodology

Sachin Maheshwari·Spyros Stathopoulos·Jiaqi Wang·Alexander Serb·Yihan Pan·Andrea Mifsud·Lieuwe B. Leene·Jiawei Shen·Christos Papavassiliou·Timothy G. Constandinou·Themistoklis Prodromakis

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Abstract

RRAM technology has experienced explosive growth in the last decade, with multiple device structures being developed for a wide range of applications. However, transitioning the technology from the lab into the marketplace requires the development of an accessible and user-friendly design flow, supported by an industry-grade toolchain. In this work, we demonstrate with examples an end-to-end design flow for RRAM-based electronics, from the introduction of a custom RRAM model into our chosen CAD tool to performing layout-versus-schematic and post-layout checks including the RRAM device. We envisage that this step-by-step guide to introducing RRAM into the standard integrated circuit design flow will be a useful reference document for both device developers who wish to benchmark their technologies and circuit designers who wish to experiment with RRAM-enhanced systems.

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Sachin Maheshwari, Spyros Stathopoulos, Jiaqi Wang, Alexander Serb, Yihan Pan, Andrea Mifsud, Lieuwe B. Leene, Jiawei Shen, Christos Papavassiliou, Timothy G. Constandinou, Themistoklis Prodromakis. 2020-12-03. Hybrid CMOS/Memristor Circuit Design Methodology. https://arxiv.org/abs/2012.02267

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