A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training

Dong Zhang; Yuye Kang; Gan Liu; Zuopu Zhou; Kaizhen Han; Chen Sun; Leming Jiao; Xiaolin Wang; Yue Chen; Qiwen Kong; Zijie Zheng; Long Liu; Xiao Gong

arXiv · 2209.09083

A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training

Dong Zhang·Yuye Kang·Gan Liu·Zuopu Zhou·Kaizhen Han·Chen Sun·Leming Jiao·Xiaolin Wang·Yue Chen·Qiwen Kong·Zijie Zheng·Long Liu·Xiao Gong

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Abstract

In this work, we report a novel design, one-transistor-one-inverter (1T1I), to satisfy high speed and low power on-chip training requirements. By leveraging doped HfO2 with ferroelectricity, a non-volatile inverter is successfully demonstrated, enabling desired continuous weight transition between negative and positive via the programmable threshold voltage (VTH) of ferroelectric field-effect transistors (FeFETs). Compared with commonly used designs with the similar function, 1T1I uniquely achieves pure on-chip-based weight transition at an optimized working current without relying on assistance from off-chip calculation units for signed-weight comparison, facilitating high-speed training at low power consumption. Further improvements in linearity and training speed can be obtained via a two-transistor-one-inverter (2T1I) design. Overall, focusing on energy and time efficiencies, this work provides a valuable design strategy for future FeFET-based computing-in-memory (CiM).

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Dong Zhang, Yuye Kang, Gan Liu, Zuopu Zhou, Kaizhen Han, Chen Sun, Leming Jiao, Xiaolin Wang, Yue Chen, Qiwen Kong, Zijie Zheng, Long Liu, Xiao Gong. 2022-09-19. A Novel Non-Volatile Inverter-based CiM: Continuous Sign Weight Transition and Low Power on-Chip Training. https://arxiv.org/abs/2209.09083

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