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arXiv · 2406.06536

Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip

Nitesh Narayana GS·Abhijit Das
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Abstract

The rapid advancements in memory systems, CPU technology, and emerging technologies herald a transformative potential in computing, promising to revolutionize memory hierarchies. Innovations in DDR memory are delivering unprecedented bandwidth, while advancements in on-chip wireless technology are reducing size and increasing speed. The introduction of godspeed wireless transceivers on chip, alongside near high-speed DRAM, is poised to directly facilitate memory requests. This integration suggests the potential for eliminating traditional memory hierarchies, offering a new paradigm in computing efficiency and speed. These developments indicate a near-future where computing systems are significantly more responsive and powerful, leveraging direct, high-speed memory access mechanisms.

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Nitesh Narayana GS, Abhijit Das. 2024-04-23. Apparate: Evading Memory Hierarchy with GodSpeed Wireless-on-Chip. https://arxiv.org/abs/2406.06536

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