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arXiv · 2412.03626

Data-Driven Approach for Accelerating Selective Harmonic Elimination Algorithm in Parallel Power Converters

E. Karimi·S. Shahnooshi·E. Meshkati·T. Dragičević·F. Blaabjerg
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Abstract

Current ripple minimization is one of the challenges in parallel converters to increase the capacitor lifetime in various applications. In this paper, a deep neural network-based phase-shifting (PS) technique is proposed for parallel-connected buck converters to minimize the amplitude of a selective harmonic component and facilitate a classic optimum PS at the same time. The proposed method identifies the global optimum point in real time, without the need for complicated computations. The common-link current, common-link voltage, and the duty ratios are selected as the inputs of the neural network to provide the proper phase shifts for the switching signals. To accumulate the required dataset, a Different Start-Same Step (DSSS) technique is also introduced to generate the training data and test/validation data in a separate way. The effect of the number of hidden layers on the network output error is investigated, and a proper number of hidden layers is designed based on a compromise between accuracy and computation efficiency (and execution time). Experimental results prove that the proposed artificial neural network-based PS method preserves the performance of classic optimum PS and minimizing the implementation time significantly.

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BibTeXRIS

E. Karimi, S. Shahnooshi, E. Meshkati, T. Dragičević, F. Blaabjerg. 2024-12-04. Data-Driven Approach for Accelerating Selective Harmonic Elimination Algorithm in Parallel Power Converters. https://arxiv.org/abs/2412.03626

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