Modeling Utilization to Identify Shared-Memory Atomic Bottlenecks

Rongcui Dong; Sreepathi Pai

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arXiv · 2503.17893

Modeling Utilization to Identify Shared-Memory Atomic Bottlenecks

Rongcui Dong·Sreepathi Pai

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Abstract

Performance analysis is critical for GPU programs with data-dependent behavior, but models like Roofline are not very useful for them and interpreting raw performance counters is tedious. In this work, we present an analytical model for shared memory atomics (\emph{fetch-and-op} and \emph{compare-and-swap} instructions on NVIDIA Volta and Ampere GPU) that allows users to immediately determine if shared memory atomic operations are a bottleneck for a program's execution. Our model is based on modeling the architecture as a single-server queuing model whose inputs are performance counters. It captures load-dependent behavior such as pipelining, parallelism, and different access patterns. We embody this model in a tool that uses CUDA hardware counters as parameters to predict the utilization of the shared-memory atomic unit. To the best of our knowledge, no existing profiling tool or model provides this capability for shared-memory atomic operations. We used the model to compare two histogram kernels that use shared-memory atomics. Although nearly identical, their performance can be different by up to 30\%. Our tool correctly identifies a bottleneck shift from shared-memory atomic unit as the cause of this discrepancy.

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BibTeX RIS

Rongcui Dong, Sreepathi Pai. 2025-03-23. Modeling Utilization to Identify Shared-Memory Atomic Bottlenecks. https://arxiv.org/abs/2503.17893

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