arXiv · 2510.13682
A 0.62 $\mu$W/sensor 82 fps Time-to-Digital Impedance Measurement IC with Unified Excitation/Readout Front-end for Large-Scale Piezo-Resistive Sensor Array
Abstract
This paper presents a fast impedance measurement IC for large-scale piezo-resistive sensor array. It features a unified differential time-to-digital demodulation architecture that readout impedance directly through the excitation circuit. The proposed pre-saturation adaptive bias technique further improves power efficiency. The chip scans 253 sensors in 12.2 ms (82 fps) at 125 kHz, consuming 158 $\mu$W (7.5 nJ/sensor). With loads from 20 $\Omega$ to 500 k$\Omega$, it achieves 0.5% error and up to 71.1 dB SNR.
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Jiayang Li, Qingyu Zhang, Sohmyung Ha, Andreas Demosthenous, Dai Jiang, Yu Wu. 2025-10-15. A 0.62 $\mu$W/sensor 82 fps Time-to-Digital Impedance Measurement IC with Unified Excitation/Readout Front-end for Large-Scale Piezo-Resistive Sensor Array. https://arxiv.org/abs/2510.13682
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