IRONSmith: A Visual Dataflow Design Environment for AMD Ryzen AI NPUs

Abstract

Machine learning inference increasingly relies on specialized hardware accelerators for throughput and power efficiency. Neural Processing Units (NPUs), such as the AMD Ryzen AI NPU, offer significant ML advantages over CPUs and GPUs, but programming them requires expertise in specialized frameworks. We present IRONSmith, the first visual dataflow design environment for programming AMD Ryzen AI NPUs. IRONSmith provides an interactive canvas displaying the AI Engine tile grid as visually connected blocks, allowing users to design ML dataflow applications by connecting tiles with wires representing FIFOs, split/join patterns, broadcast connections, and DDR transfers without writing any code. Compute kernels are assigned from a pre-built library, and worker functions are configured through property panels. IRONSmith's backend pipeline automatically translates the visual design into executable IRON Python, handling structural completion, import resolution, and dependency management automatically. Generated code executes directly on the AMD Ryzen AI NPU. We demonstrate IRONSmith across ML designs of increasing complexity, from a single-tile vector passthrough to multi-tile matrix operations to a complete Multi-Layer Perceptron, all designed visually and successfully executed on the AMD Ryzen AI NPU. IRONSmith serves educators, students, ML researchers, and engineers by bridging the gap between ML knowledge and NPU programming expertise, widening access to hardware that is rapidly becoming standard across consumer and enterprise devices.