Search arXivSearch

arXiv · 2607.26821

Mind the Gap: The Disconnect Between Synthetic and Natural Edge Weights in Parallel Single-Source Shortest Path

Abstract

Scientific research works often evaluate Parallel Single-Source Shortest Path (SSSP) algorithms using synthetic, uniformly distributed edge weights. However, real-world graphs exhibit very different, often heavy-tailed, weight distributions. This creates a disconnect between how algorithms are evaluated and their real-world performance, since most SSSP implementations inherently rely on the weight distribution for parameter tuning and work efficiency. In this paper, we explore whether current benchmarking methods unintentionally bias the performance results of these algorithms. To this end, we statistically characterize the weight distributions of 17 real-world graphs from a variety of domains and contrast them with six synthetic distributions used in the literature. Through a comprehensive evaluation of seven state-of-the-art parallel SSSP algorithms, we demonstrate severe sensitivity to edge weights, and show that evaluating with synthetic uniform weights alters optimal parameter configurations and can invert the performance hierarchy. These findings challenge existing benchmarking standards and offer practical insights for rigorous SSSP algorithm design.

Explore related subjects

Keep this discovery

BibTeXRIS

Marco D'Antonio, Thai Son Mai, Hans Vandierendonck. 2026-09-01. Mind the Gap: The Disconnect Between Synthetic and Natural Edge Weights in Parallel Single-Source Shortest Path. https://arxiv.org/abs/2607.26821

Cite the original work for its findings. Save a collection to share your selection of sources.

Discover connections

Connections use source metadata and explicit phrase matches, not verified experimental comparisons.

KEEP EXPLORING

Related papers

Beyond Lemma Sharing -- Novel Parallelization Strategies for Property Directed Reachability

Property Directed Reachability (PDR) is a commonly used technique for automated hardware model checking, yet efficiently parallelizing it remains a significant challenge. Existing approaches, such as lemma sharing, often suffer from limited scalability as processor counts increase. In this work, we present two novel sharing-based parallelization strategies, preemptive propagation and ARPOS, and compare their performance with classical lemma sharing. To this end, we develop an asynchronous MPI-based message passing framework for the state-of-the-art rIC3 hardware model checker. Experimental results on the 2025 Hardware Model Checking competition benchmark demonstrate that our preemptive propagation strategy yields a significant performance boost over classical lemma sharing.

cs.DC

Towards Decentralized Registries for Assets Metadata Information

The effort to tokenize non-currency assets faces several hurdles, including the lack of a scalable decentralized computing infrastructure to manage asset-related metadata. While the centralized securities depository model has served the financial industry well for several decades, the vision of tokenization at a global scale requires new infrastructure that enables distributed control while protecting the integrity of asset-related metadata, regardless of where it is stored. In this paper, we discuss the decentralized artifacts metadata registry model for tokenized assets as a possible direction for the financial industry seeking to embrace tokenization. The artifacts metadata registries extend the function of the traditional CSD, and could in fact be a new type of service offered by CSDs around the world.

cs.DC

JAXMg: A multi-GPU linear solver in JAX

Solving large dense linear systems and eigenvalue problems is a core requirement in many areas of scientific computing, but scaling these operations beyond a single GPU remains challenging within modern programming frameworks. While highly optimized multi-GPU solver libraries exist, they are typically difficult to integrate into composable, just-in-time (JIT) compiled Python workflows. JAXMg provides distributed dense linear algebra for JAX, enabling linear solves and decompositions for matrices that exceed single-GPU memory limits. By interfacing JAX with NVIDIA's cuSOLVERMp through an XLA Foreign Function Interface, JAXMg exposes distributed GPU routines as JIT-compatible JAX primitives. This design allows scalable linear algebra to be embedded directly within JAX programs, preserving composability with JAX transformations and enabling multi-GPU and multi-node execution in end-to-end scientific workflows.

cs.DC