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arXiv · 2609.06365

multi-Stochastic Core Architecture for Scaling Probabilistic Ising Machines

Chirag Garg·Pratik Brahma·Saavan Patel·Sayeef Salahuddin
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Abstract

Ising Machines offer vast potential to solve NP-hard optimization problems efficiently that are intractable to solve using conventional computing architecture. A lot of these optimization problems fall into statistical learnability and involve finding an optimal solution among many possible, near-analogous configurations, by searching in a non-convex energy landscape. In this context, the probabilistic Boltzmann machine architecture especially PASS (Parallel Asynchronous Stochastic Sampler), explores and models the complex probability landscape pertaining to all possible configurations and excels in finding the ground-state energy solution of these intractable problems. Additionally, the noise-based neuron architecture addresses the limitation of conventional annealing methods, which may get stuck around local minima. Here, we demonstrate a stochastic sampling approach based on Block Gibbs Sampling to integrate multiple asynchronous PASS chips (four in this work), enabling improved scalability. Further, we demonstrate the scaling by mapping 784 nodes Max-Cut problem integrating 256 nodes PASS accelerator manufactured in 14 nm CMOS FinFET technology. PASS-enabled system with Block Gibbs Sampling protocol shows approximately 1000 times speedup for Max-Cut optimization compared to state-of-the-art methods implemented on CPUs and GPUs. The general applicability of this approach is further illustrated by solving a quantum spin chain Transverse Ising system and accurately representing complex probability landscapes. Moreover, our results demonstrate the change in the scaling law to constant in the scaled-PASS accelerator as compared to exponential on GPUs enabling at least 4 orders of magnitude improvement in time-to-solution. Hence, the presented methodology enables the pathway for scaling of asynchronous brain-like dynamics systems that do not follow any clock for its operation.

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Chirag Garg, Pratik Brahma, Saavan Patel, Sayeef Salahuddin. 2026-09-06. multi-Stochastic Core Architecture for Scaling Probabilistic Ising Machines. https://arxiv.org/abs/2609.06365

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