arXiv subjects

Domenic Keller

Publications and source records attributed to Domenic Keller.

3 recordsLinked to original sources

arXiv2026

An Open-Source Standard-Cell Library for IHP 130nm Developed by Students

Standard-cell libraries form the critical interface between transistor-level circuit design and automated digital design flows, yet their design and characterization are rarely covered in depth in digital VLSI courses. This paper presents VLSI 5, a graduate-level course at ETH Zurich in which students design, lay out, characterize, and integrate their own standard cells using IHP's open-source 130nm SG13G2 process design kit. In the first course offering, 19 students developed EZ130 8T, an open-source eight-track standard-cell library comprising 220 cells. We evaluate successive library versions using eight synthesis benchmarks, across which EZ130 8T achieves significant area reduction compared to the SG13G2 library at competitive timing. For a postlayout 8x8 matrix-vector multiplier, EZ130 8T reduces cell area by 35% and energy by 39% while maintaining virtually the same clock period. The library has already been adopted in other ETH Zurich VLSI courses, enabling the creation of chips entirely designed by students down to the transistor level.

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arXiv2026

Alias-Free Oscillator Synchronization via Additive Synthesis

Oscillator synchronization is a widely used sound-synthesis technique, but straightforward digital implementations suffer from aliasing artifacts. This paper presents an alias-free method for digital emulation of oscillator synchronization of arbitrary periodic waveforms based on additive synthesis. Starting from a finite set of Fourier-series coefficients representing a bandlimited free-running waveform, we derive linear spectral-resampling transforms that map these coefficients to those of the bandlimited synchronized waveform. Beyond conventional hard synchronization, the proposed approach also supports two additional soft-synchronization modes. To address the high computational complexity of the proposed method, we introduce HASY, a 6 mm^2 application-specific integrated circuit (ASIC) fabricated in 65 nm CMOS technology. HASY generates one 96 kHz, 24 bit alias-free synchronized waveform with up to 512 harmonics and computes the spectral-resampling transform within only five audio-sample periods.

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arXiv2023

An Aliasing-Free Hybrid Digital-Analog Polyphonic Synthesizer

Analog subtractive synthesizers are generally considered to provide superior sound quality compared to digital emulations. However, analog circuitry requires calibration and suffers from aging, temperature instability, and limited flexibility in generating a wide variety of waveforms. Digital synthesis can mitigate many of these drawbacks, but generating arbitrary aliasing-free waveforms remains challenging. In this paper, we present the +-synth, a hybrid digital-analog eight-voice polyphonic synthesizer prototype that combines the best of both worlds. At the heart of the synthesizer is the big Fourier oscillator (BFO), a novel digital very-large scale integration (VLSI) design that utilizes additive synthesis to generate a wide variety of aliasing-free waveforms. Each BFO produces two voices, using four oscillators per voice. A single oscillator can generate up to 1024 freely configurable partials (harmonic or inharmonic), which are calculated using coordinate rotation digital computers (CORDICs). The BFOs were fabricated as 65nm CMOS custom application-specific integrated circuits (ASICs), which are integrated in the +-synth to simultaneously generate up to 32768 partials. Four 24-bit 96kHz stereo DACs then convert the eight voices into the analog domain, followed by digitally controlled analog low-pass filtering and amplification. Measurement results of the +-synth prototype demonstrate high fidelity and low latency.

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