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P. Alex May

Publications and source records attributed to P. Alex May.

2 recordsLinked to original sources

Towards Foundation Models on Hardware Accelerators for Particle Physics

Bandwidth constraints require many particle physics experiments to make real-time decisions on custom hardware or firmware running simplified algorithms, unlike offline analysis, where latency is usually not a limiting factor. For example, for particle jet tagging at colliders, state-of-the-art performance is achieved by foundation models with hundreds of millions of parameters pre-trained with billions of jets. We use knowledge distillation to transfer what such models have learned into efficient networks towards deployment in hardware accelerators. The teacher is the OmniLearned foundation model fine-tuned on top quark jet tagging; the student is an attention-free Deep Sets network. We demonstrate three ways the student's performance improves: adding a message-passing layer to the Deep Sets architecture, training on the teacher's soft labels rather than on ground-truth labels alone, and distilling from a pretrained teacher rather than from the same architecture trained from scratch. In each case the gain is largest in the background rejection at low signal efficiency, the regime that is most relevant for a trigger.

hep-ph

Ultra Fast Calorimeter Simulation with Generative Machine Learning on FPGAs

Computationally expensive, high-accuracy detector simulations are a major bottleneck for many particle physics experiments such as those at the Large Hadron Collider (LHC) as well as those planned for future colliders. This challenge has motivated the development of fast generative machine learning based surrogates. We present a hardware-aware variational autoencoder model for fast calorimeter simulation that is designed specifically for field programmable gate array (FPGA) deployment, offering faster and lower power inference capability. Quantization aware training and other compression techniques are applied to respect the resource constraints of a single FPGA. The synthesized implementation of the VAE decoder achieves sub-millisecond latency, resulting in a substantial speed up compared to a traditional GPU implementation with only a small performance drop. This feasibility study demonstrates the potential of utilizing existing FPGA architecture at the LHC and other facilities for efficient offline computing using online resources.

physics.ins-det