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Pelayo Leguina

Publications and source records attributed to Pelayo Leguina.

3 recordsLinked to original sources

Integer Quantization of Graph Neural Networks for Real-Time FPGA Track Finding

Real-time track finding for displaced-muon signatures in the CMS Level-1 trigger must operate under strict fixed-latency constraints of 12.5 $μ$s while processing high-throughput detector data. Because muon hits map naturally onto sparse, irregular graphs, graph neural networks (GNNs) are attractive candidates; however, mapping message-passing models to field-programmable gate arrays (FPGAs) requires careful co-design of numerical precision, microarchitecture, and high-level synthesis (HLS) implementation. This work presents a reproducible, bit-exact workflow bridging GNN design and FPGA prototyping for fixed-latency inference. The methodology is demonstrated by implementing a two-layer GraphSAGE network onto an XCVU13P FPGA, using the Cora citation network as a fixed-size benchmark for firmware evaluation that decouples deployment feasibility from the physics task. Starting from a 32-bit floating-point reference that exceeds the available FPGA resource budget, we derive an integer-only datapath through post-training quantization (INT8 weights and activations, INT32 biases), a power-of-two scale approximation that replaces rescaling multipliers with arithmetic shifts, and data-driven bit-width narrowing. Every stage is validated bit-exactly against a Python integer emulator in Vitis HLS C-simulation. The optimized INT8 power-of-two design achieves an inference latency of 19 clock cycles (52.8 ns at the nominal 360 MHz clock) at 20\% DSP, 6\% FF, and 27\% LUT utilization, with 75.0$\pm$1.1\% accuracy compared to the 78.0$\pm$0.8\% for FP32. Accuracy is reported as the average across multiple training seeds. The resulting workflow establishes a concrete, transferable path toward fixed-latency GNN-based track reconstruction in the CMS Level-1 trigger.

hep-ex↗

On the Codesign of Scientific Experiments and Industrial Systems

The optimization of large experiments in fundamental science, such as detectors for subnuclear physics at particle colliders, shares with the optimization of complex systems for industrial or societal applications the common issue of addressing the inter-relation between parameters describing the hardware used in data production and parameters used to analyse those data. While in many cases this coupling can be ignored -- when the problem can be successfully factored into simpler sub-tasks and the latter addressed serially -- there are situations in which that approach fails to converge to the absolute maximum of expected performance, as it results in a mis-alignment of the optimized hardware and software solutions. In this work we consider a few use cases of interest in fundamental science collected primarily from particle physics and related areas, and a pot-pourri of industrial and societal applications where the matter is similarly of relevance. We discuss the emergence of strong hardware-software coupling in some of those systems, as well as co-design procedures that may be deployed to identify the global maximum of their relevant utility functions. We observe how numerous opportunities exist to advance methods and tools for hardware-software co-design optimization, bridging fundamental science and industry through application- and challenge-driven projects, and shaping the future of scientific experiments and industrial systems.

physics.ins-det↗

Using AI on FPGAs for the CMS Overlap Muon Track Finder for the HL-LHC

Operating the CMS Level-1 trigger under the intense conditions of the High-Luminosity Large Hadron Collider -- with approximately 63~Tb/s of input and a fixed 12.5~$μ$s latency -- poses a demanding real-time reconstruction challenge. The CMS muon system is organized into three regions: a barrel, an endcap, and the intermediate barrel-endcap ``overlap'' region. In this overlap transition, the Overlap Muon Track Finder can be suboptimal for displaced-muon and long-lived-particle signatures. We present a first approach to a graph neural network tailored to these constraints, using GraphSAGE layers and a compact multi-layer perceptron to regress the inverse transverse momentum of muons. A PyTorch to C++ and high-level synthesis flow demonstrates feasibility, with initial results showing good agreement with simulation. Although a fully parallel implementation would exceed available field-programmable gate array resources, quantization, pruning, and multiplier reuse point the way toward a practical Phase-2 deployment.

hep-ex↗