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physics.ins-det

physics.ins-det: explore 3 source-linked works published from 2025 to 2026, with original documents and citations.

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Sources: arxiv. Collection updated 2026-09-15. Counts describe this index, not the complete source archives.

How Architecture and Training Affect TPC Representations Across Experiments

Deep-learning efforts have increasingly shifted toward foundation model approaches. In experimental physics, this allows models and learned representations to be reused beyond the experiments in which they were developed. This work evaluates the reusability of representations across experiments and detector systems using probes on frozen encoders. These probes reveal task-relevant structure before downstream adaptation, complementing fine-tuning. Together with random-weight controls, they distinguish contributions from architecture and encoder training that downstream performance alone cannot resolve. Time projection chamber (TPC) data provide a useful testbed because events from TPC systems can be represented as variable-length sparse tensors, while detector geometries, event topologies, and scientific tasks can differ substantially. We investigate whether fixed-dimensional TPC event representations can be reused across classification tasks, experiments, and detector systems. Sparse ResNet and PointNet-style encoders produce 512-dimensional embeddings for four datasets from the GADGET II TPC and AT-TPC. Randomly initialized encoders isolate the contribution from architecture before supervised training. We then train each encoder on a classification task, freeze its parameters, and train a linear or nonlinear probe for each downstream task. We find that this architecture-induced structure remains useful across experiments and detector systems. The randomly initialized PointNet-style representation is highly informative on several tasks. The two architectures organize their embedding spaces differently, but neither exhibits a large, systematic loss of utility cross-detector. These results show that architecture is a major source of task-relevant structure in TPC embeddings and should be treated explicitly when assessing representation learning and developing reusable detector models.

cs.LG

Hadronic Mono-Z Dark Matter Sensitivity with Flow Matching on CMS Open Data

We present a projected sensitivity study for hadronic mono-$Z$ dark-matter production using CMS Run~2015D HTMHT open data corresponding to 2.256382381~\invfb, from which 1{,}439{,}523 events satisfy the hadronic mono-$Z$ selection. Backgrounds are modelled with a conditional flow-matching continuous normalizing flow trained on the selected HTMHT events and evaluated on a held-out validation split reweighted to the full selected population. To mitigate artifacts from missing-object features and avoid in-sample scoring bias we apply sentinel imputation for undefined angular features, persist the train/validation split indices, and enforce a minimum reported background yield of 20 events when selecting the working point. A signal-side offline trigger proxy is applied to the simulated signal before scoring. Under this procedure the baseline analysis yields expected significances of 2.89$σ$, 7.62$σ$, and 7.41$σ$ for three simplified-model benchmarks. An ablation study that removes the detailed extra-jet kinematics reduces the expected significance by 53--71\%, indicating that extra-jet topology carries substantial discriminating power in the hadronic mono-$Z$ channel. These results are projected sensitivities (no unblinding performed); the limitations and reproducibility of the study are discussed in Sections limitations and reproducibility.

hep-ex

Scalable FPGA Framework for Real-Time Denoising in High-Throughput Imaging: A DRAM-Optimized Pipeline using High-Level Synthesis

High-throughput imaging workflows, such as Parallel Rapid Imaging with Spectroscopic Mapping (PRISM), generate data at rates that exceed conventional real-time processing capabilities. We present a scalable FPGA-based preprocessing pipeline for real-time denoising, implemented via High-Level Synthesis (HLS) and optimized for DRAM-backed buffering. Our architecture performs frame subtraction and averaging directly on streamed image data, minimizing latency through burst-mode AXI4 interfaces. The resulting kernel operates below the inter-frame interval, enabling inline denoising and reducing dataset size for downstream CPU/GPU analysis. Validated under PRISM-scale acquisition, this modular FPGA framework offers a practical solution for latency-sensitive imaging workflows in spectroscopy and microscopy.

cs.AR
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